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Package Outlines
Figure 2. 3x3 mm MLP-8 (Top View)
Thermal Characteristics (2)
Figure 3. SOIC-8 (Top View)
Package
8-Lead 3x3 mm Molded Leadless Package (MLP)
8-Pin Small Outline Integrated Circuit (SOIC)
Θ JL(3)
1.6
40
Θ JT(4)
68
31
Θ JA(5)
43
89
Ψ JB(6)
3.5
43
Ψ JT(7)
0.8
3.0
Unit
°C/W
°C/W
Notes:
2. Estimates derived from thermal simulation; actual values depend on the application.
3.
4.
5.
6.
7.
Theta_JL ( Θ JL ): Thermal resistance between the semiconductor junction and the bottom surface of all the leads (including any
thermal pad) that are typically soldered to a PCB.
Theta_JT ( Θ JT ): Thermal resistance between the semiconductor junction and the top surface of the package, assuming it is
held at a uniform temperature by a top-side heatsink.
Theta_JA ( Θ JA ): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking, and airflow.
The value given is for natural convection with no heatsink using a 2S2P board, as specified in JEDEC standards JESD51-2,
JESD51-5, and JESD51-7, as appropriate.
Psi_JB ( Ψ JB ): Thermal characterization parameter providing correlation between semiconductor junction temperature and an
application circuit board reference point for the thermal environment defined in Note 5. For the MLP-8 package, the board
reference is defined as the PCB copper connected to the thermal pad and protruding from either end of the package. For the
SOIC-8 package, the board reference is defined as the PCB copper adjacent to pin 6.
Psi_JT ( Ψ JT ): Thermal characterization parameter providing correlation between the semiconductor junction temperature and
the center of the top of the package for the thermal environment defined in Note 5.
? 2007 Fairchild Semiconductor Corporation
FAN3226 / FAN3227 / FAN3228 / FAN3229 ? Rev. 1.1.0
3
www.fairchildsemi.com
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